Current Openings At GDA Technologies

Current Openings At GDA Technologies

Member of Technical Staff, IC Physical Designs:

Location: India, Chennai

ASIC design & development (including understanding customer requirements)
ASIC backend physical design; ASIC backend physical verification & DFM (design for manufacturability)
ASIC full chip assembly
Writing automating scripts.
Bachelor's or equiv foreign degree in EE or Comp Eng
Requires setup & execution of complete ASIC physical design flow using
- Synopsys,
- Cadence, &
- Magma tools
Full chip assembly & tape-out to foundry;
PERL, TCL, & TK scripting languages.

Apply

Senior Member of Technical Staff, IC Physical Designs:

Location: India, Chennai.

Thorough hands-on Knowledge of Physical design activities such as
- Floor planning
- Placement
- Routing
- Clock tree synthesis
- Static timing analysis
- Signal integrity analysis
- Power verification
- Formal Verification
- Timing optimization
- Physical verification

Experience in

- SoC Encounter Flow
- Timing Closure
- STA
- Signal Integrity IR Drop Analysis
- Design For Manufacturing
- Physical Verification
- Physical Synthesis
Knowledge in Magma Blast Fusion, Astro, Hercules a plus
Must possess good communication skills
Must have excellent project execution skills
Must be highly motivated and team player
Experience with TCL and Perl a plus
Experience of working with Multiple ASIC vendors will be an asset.

Apply

IT Manager:

Manage 3-5 Systems Engineers who install & configure servers with different operating systems, who support the servers, PCs, & work stations, and who install patches for the designing tools;

Use Solaris, Redhat, & Windows OS.

Apply

Principle Design Engineer:

RTL (register transfer logic) design & implemention using frontend and backend CAD tools;

Synthesis & DFT (design for testability) using Synopsys & Mentor Graphics tools; post silicon verification;

Static timing analysis using Prime Time tool;

Place & route using Cadence First Encounter & Sierra Pinnacle tools;

Use CAD & deep submicron methodologies.

Apply

Engineering Manager:

Supervise 3-5 System Software or ASIC Engineers who design, develop, test, & implement embedded tools & applications;

Perform requirement analysis, project planning, status reporting, & tracking;

Provide pre-sale support and write project proposals for customers.

Apply

Chip Verification Lead:

Perform chip verification (including development of methodologies, test plans, compliance test suite, test bench creation, & test cases) using System Verilog, SystemC, C++, & VERA;

Develop scripts;

Develop test bench components (like BFM, transactors, assertions, coverage, protocol monitors, & checkers);

Manage regression;

Perform board validation;

Manage code releases.

Apply

Contact Us

Headquarter
GDA Technologies Ltd
L&T Infotech Park
Mount Poonamalle Road
Manapakkam
Chennai – 600 089
India
Tel 91 44 2253 7900
Email: info@gdatech.co.in
website: http://www.gdatech.com/default.shtml

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